Behavioral modeling with a hardware description language (HDL) is the key to modern ASIC design. Readers preparing to contribute to a productive design team must know how to use a hardware description language at key stages of the design flow. This book is written for a course going beyond the basic principles and methods learned in a first course in digital design. Our focus is on design methodology enabled by an HDL. Our goal is to build on a student's background from a first course in logic design by reviewing basic principles of combinational and sequential logic, introducing the use of HDLs in design, emphasizing descriptive styles that will allow the reader to quickly design working circuits suitable for application-specific integrated circuit (ASIC) and/or field-programmable gate array (FPGA) implementation, and providing in-depth design examples using modern design tools. Readers are encouraged to simplify, clarify, and verify their designs. The Verilog hardware description language (IEEE Standard 1364) serves as a common framework supporting the design activities treated in this book, but our focus is on developing, verifying, and synthesizing designs of digital circuits, not on the Verilog language. Most students taking a second course in digital design will be familiar with at least one programming language and will be able to draw on that background in reading this text. We cover only the core and most widely used features of Verilog. Chapter 1: Introduction to Digital Design Methodology Chapter 2: Review of Combinational Logic Design Chapter 3: Fundamentals of Sequential Logic Design Chapter 4: Introduction to Logic Design with Verilog Chapter 5: logic Design with Behavioral Models of Combinational and Sequential Logic Chapter 6: Synthesis of Combinational and Sequential Logic Chapter 7: Design and Synthesis of Datapath Controllers Chapter 8: Programmable Logic and Storage Devices Chapter 9: Algorithms and Architectures for Digital Processors Chapter 10: Architectures for Arithmetic Processors Chapter 11: Postsynthesis Design Tasks AppendicesCiletti, Michael D. is the author of 'Advanced Digital Design With Verilog Hdl', published 2002 under ISBN 9780130891617 and ISBN 0130891614.